This invention relates to an apparatus for updating a secondary data base of a redundant processor in a process control system, and more particularly, to an apparatus for tracking changes of predetermined data of a primary data base for subsequent updating of a secondary data base.
Process Control Systems with backup process controllers such as described and claimed in U.S. Pat. No. 4,133,027, issued to J. A. Hogan on Jan. 2, 1979, and U.S. Pat. No. 4,141,066, issued to Y. Keiles on Feb. 20, 1979, include a backup controller having a dedicated Random Access Memory (RAM) and a dedicated Read-Only Memory (ROM). The backup controller is essentially idle or can be doing some background tasks, but generally not tasks relating directly to the process control function. Upon detection of a failure of one of the primary process controllers, the data stored in the RAM of the failed controller must be transferred to the RAM of the backup controller to perform the operations of the primary controller. These systems describe a 1:N redundancy system.
In the present invention, there is provided in a 1:1 redundancy system, an apparatus which captures and stores predetermined information as the information is being stored in a primary memory of a primary controller. The secondary data base of a secondary device (i.e., secondary or backup controller) is updated periodically with the information stored in the apparatus of the present invention such that the updating process does not tie-up or penalize CPU or processor performance of the primary controller and utilizes a minimum amount of time. The apparatus of the present invention captures (and subsequently updates) only the information which was changed, resulting in a more efficient use of the primary CPU or microprocessor, and allows the updating process to be performed more frequently, and on a real-time basis. Thus, when a failover condition occurs, the time to get the secondary controller to take over for a failed primary controller is substantially minimized.